August 11 2022: A C compiler.

A very big project

The teaser video thumbnail

The teaser video thumbnail

(Finally it's here in a demonstrable capacity!)

Today, I finished Lily-CC (my C compiler) just barely enough to complete a function call. There is a video demo of what it can compile so far, but to sum it up:

  • It compiled two functions,
  • It made function position-independent code,
  • It compiled a while loop,
  • And it does string constants.

For the most part, that is all it can do. There are still many things (like for loops) that need to be made before C can be written.

Also shown in the video was a very small part of Pixie16 (PX16 for short), the current target for Lily. It is much more finished than Lily-CC is, and is being held back by Lily's development. Why is a CPU being held back by a C compiler you may ask? Simple: I want to run programs written mostly in C.

However, with today's success this changes. There are only a handful of things that need to work before software testing on PX16 can begin. After all, the compiler doesn't need to be 100% finished before compiling code with it is viable.

About Pixie16

PX16 in its full glory

PX16 in its full glory

Pixie16 is my latest CPU design, incorporating every lesson I have learned. PX16 is a 16-bit RISC CPU with 4 general-purpose registers, 3 special registers and 4 instructions.

I want to (and maybe it's not practical) have more users than just myself. The original goal was to make a little gameboy-sized computer with PX16, but I'm not sure that people will want to have one. Though my goals include low-power operation and simple enough to produce on a PCB, I'm not entirely sure what else I'd use for, so any suggestions are welcome.

Being made to contain no instruction set ROM, it could theoretically reach higher clock speeds. It also has an almost 100% IPC (Instructions Per Clock) uplift compared to GR8CPU Rev3.2, so it would actually perform even better compared to my previous design.

Specs for CPU nerds:

  • 16-bit only von Neumann architecture
  • 4 general-purpose registers
  • Position-Independent Code
  • One- and two-input math instructions
  • Optional carry continuity between math operations
  • Add, Subtract, Shift, And, Or, Xor and Compare
  • Signed number support (signed carry flag and carry extend MOV)
  • Conditional MOV instructions
  • Two interrupt channels, though both maskable
  • All memory operations for all instructions
  • Stack integrated into memory model

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